1. Field of the Invention
The present invention relates to interface circuits converting send data into a pair of differential voltage signals and outputting the pair of differential voltage signals in sending data, and converting the pair of differential voltage signals received into a former data and outputting the former data in receiving data.
2. Description of Related Art
Recently, serial communications have been spread one of them includes a receiver which needs predetermined receiving sensitivity. For example, in USB specification which is one of the serial communications, as shown in FIG. 5, in the case where a differential voltage of a differential voltage signal is equal to or more than 150 mV and equal to or lower than −150 mV, it is specified that the signals are received as normal signals. In the case where a differential voltage of a differential voltage signal which is input signal is from −100 mV to 100 mV, the signal is cut off because it is squelch condition. As just described, because USB specification requires a high receiving sensitivity, it is desired to confirm a receiving sensitivity accurately and easily.
Here, Japanese Unexamined Patent Application Publication No. 2005-267124 (Yoshimoto) describes a transceiver interface which can estimate a sensitivity of a receiver (receiver for reception). As shown in FIG. 6, a transceiver interface 250 of the prior art realizes a data transfer of serial bus specification by converting send data into a pair of differential voltage signals and outputting it in sending data, and converting the received pair of differential voltage signals into a former data and outputting it in receiving data.
The transceiver interface 250 includes a reference voltage generation circuit 211. The reference voltage generation circuit 211 receives a power supply voltage VDD and a ground power supply voltage VSS and then generates a reference voltage signal. Further the transceiver interface 250 includes an inverter 212 and a pair of current driven drivers 213, 214. The send data is converted into the pair of differential voltage signals by the inverter 212 and a pair of current driven drivers 213, 214. The voltage level of the pair of differential voltage signals is determined by the reference voltage and a termination resistor as described below. The transceiver interface 250 further includes a receiver 215. The receiver 215 converts the pair of differential voltage signals which is received data into the former data.
The transceiver interface 250 further includes a sending data input terminal 201, a power supply input terminal 202, a ground supply input terminal 203, a received data output terminal REC 204, and differential voltage signal input and output terminals DP205, DM206. The differential voltage signal input and output terminals DP205, DM206 are connected to serial cable and input and output a pair of a differential voltage signals.
The transceiver interface 250 can input a voltage signal which is input from an external device and has arbitrary voltage level to the pair of current driven drivers 213, 214. In this way, the reference voltage generation circuit 211 has a first switch circuit (not shown) and a second switch circuit 216. The second switch circuit 216 is connected to a signal input terminal AAP and inputs the voltage signal which has arbitrary voltage level from an external device to the pair of current driven drivers 213, 214. The reference voltage generation circuit 211 is controlled by the first switch circuit so as to input the reference voltage signal to the pair of current driven drivers 213, 214 at normal timing and to shut off supply of the reference voltage signal at test timing.
A switch circuit switches a voltage signal which is input to the pair of current driven drivers 213, 214 to the reference voltage signal from the reference voltage generation circuit 211 or a voltage signal from the signal input terminal AAP207 based on a control signal from a first control terminal 208 connected to the switch circuit which has the second switch circuit 216 and the first switch circuit.
FIG. 7 is a view showing a specific example of the current driven driver. A reference voltage signal which is generated by a reference voltage generating circuit 251 is input to an input terminal 241 of a current driven driver 220. The current driven driver 220 includes send data input terminal 242 to which send data is inputted and a differential voltage signal output terminal 243 to which a reference voltage signal is input. The differential voltage signal output terminal 243 is connected to a differential voltage signal input and output terminal DP205. The current driven driver 220 corresponds to a current driven driver 213. Note, a current driven driver connected to a differential voltage signal input and output terminal DM has a same constitution and operation as above described, therefore the explanation is omitted.
The current driven driver 220 has an operational amplifier 221, P channel transistors 222-225, and N channel transistors 226-228 and transistors 222 and 223, 224 and 225, and 226 and 227 of those transistors configure current mirrors.
A constant current I3 is determined by a voltage level Vref input to a reference voltage input terminal 241 and a current mirror ratio and a driver flowing the constant current I3 is configured. When a signal level of send data is H, the transistor is turned on by terminating a differential voltage signal output terminal 243 with external resistors 230, 231. Then the constant current I3 flows in the external resistors 230, 231 and the voltage level of the differential voltage signal output terminal 243 is determined. That is, if a current flowing in the transistor 225 is I3, and resistances of the resistors 231, 232 are Rs1, Rs2, a voltage of the differential output voltage signal terminal 243 is Vdp=I3((1/Rs1)+(1/Rs2)). On the other hand, when a signal level of send data is L, since transistor 228 is turned off, the constant current I3 does not flow and a voltage level of the differential voltage signal output terminal 243 becomes GND. Thus, the voltage level of the differential voltage signals is determined by the voltage level input to the reference voltage input terminal 241 and resistances of the external resistances 230, 231.
In this prior art, at the sensitivity test of the receiver for itself, the differential voltage signal terminals DP205, DM206 of FIG. 6 are connected to the external resistance. When the signal input terminal AAP is enabled by the control terminal 208, and a voltage signal input from the signal input terminal AAP207 is input to a pair of the current driven drivers 213, 214, a constant current which is proportional to a voltage level which is input is output from the pair of the current driven drivers 213, 214 according to the signal level of the send data. The constant current is flowed in the external resistance, and the voltage level of the differential voltage signal terminals DP205, DM206 are determined, and then a potential difference between the differential voltage signal terminals DP205 and DM206 are generated. The differential signal of the potential is performed whether or not the receiver receives the signal.
Therefore, the sensitivity test of the receiver for itself is performed by inputting an arbitrary voltage level from an external device by using the signal input terminal AAP207 and generating a voltage level corresponding to the arbitrary voltage level in the differential voltage signal terminals DP205 and PM206.
However, according to the transceiver interface 250 of the prior art, there is a problem that an own power supply unit is needed since an arbitrary voltage level is supplied from an external device. Recently, with multi-functionalization by SOC (System On Chip), LSI gets to have many power supplies. Therefore it is not realistic to use a dedicated power supply unit in test. Further there is another problem that a test accuracy becomes low by an external effect such as an accuracy of a voltage supply source or a voltage drop with supplying a power supply from an external device.